1. Field of the Invention
This invention relates to an emulator probe assembly that couples an emulator system to an electrical circuit network under development, and in particular an emulator probe assembly that is useful with a system under development that incorporates a programmable logic device.
2. Description of the Prior Art
When a product is being designed or a designed product is being tested, special equipment is generally employed to determine that the product will perform as intended. The equipment employed depends upon the product and the kind of testing to be performed. One prior art system for testing wiring on a printed circuit board taught by Trousdale et al. in U.S. Pat. No. 3,549,995 issued Dec. 22, 1970 verifies the wiring of a board under test against a like master unit which has been verified as having correct wiring. (see Trousdale, col. 4, lines 46-49) Vinsani, U.S. Pat. No. 3,882,386 issued May 6, 1975 also teaches comparing a unit under test with a reference unit.
For testing more complex devices, the test equipment generally tests separate portions of the device in order to isolate the location of failure. Providing test points which give easy access to the individual pins of a device is known, and shown, for example, on pages 2-4 of the 1987 Product Catalog of Emulation Technology, Inc.; 2368B Walsh Ave., Bldg. D, Santa Clara, Calif. 95051. French patent publication No. 2,260,257 published Aug. 29, 1975 on the invention of Marcel Rehel and Jean-Claude Lepinay teaches an articulated plug board which plugs into the socket of the device to be tested and which includes switches such that individual signals from the board to the device under test can be disconnected during testing. The articulated device allows flexibility in physically locating the device under test. The 1988 catalog from Emulation Technology, ibid, also shows on page 11 such a device, not articulated. For still more complex devices, signals generated by a computer are provided to a device under test and responses from the device are compared to expected responses. U.K. Patent Application No. GB2178543A of inventors Scott and Polstra published Feb. 11, 1987 teaches a computer assisted method of isolating a fault in a circuit board. U.S. Pat. No. 4,176,780 to Sacher et al issued Dec. 4, 1979 also teaches a computer assisted method for testing printed circuit boards.
When designing an electrical circuit network which includes integrated circuit logic chips, the designer generally uses an emulator to assist in the design. Generally, emulators are used to permit a computer or data processor to perform operations which will eventually be performed by another system. Emulators generally employ hardware that enables an imitating system to accept the same data, execute the same programs and achieve the same results as the system under development while allowing more control over the imitating system than available over the system under development.
With the archival of programmable logic devices (PLDs), there is now a need for testing not only a circuit board but for testing a particular program being used by the circuit board to program a programmable logic device. For circuits using programmable logic devices, the designer uses the emulator during development and testing to provide signals to the programmable logic device which are the same as those to be provided by a circuit board in the system under development. The designer has a need to determine whether the system under development has any defects or problems.
To couple the emulator system to the system under development, emulator probe assemblies are utilized. Typically, emulator probes employ electromechanical devices that enable connection between the emulator and the system under development. The emulator probes are configured to fit into a socket of the system under development in which the integrated circuit chip device normally is inserted. Most emulator probes are relatively large and use considerable space when mounted on a circuit board. When used on densely populated boards, the emulator probe may physically interfere with adjacent components thereby limiting the number of components and the arrangement of the elements of the system under development. It is therefore desirable to have an emulator probe that uses no more space than the integrated circuit chip device that normally resides in the socket of the system under development in order that the probe may be plugged directly into the socket in which the integrated circuit chip normally resides. Also, when emulator probes are used with test equipment, attachment and proper connection between the emulator probe and the test equipment has been found to be very difficult and time-consuming. Furthermore, signal lines that are connected to the emulator probe usually are relatively long, several inches in length, for example, so that capacitive and inductive loading on the electrical circuits are increased, thereby adversely affecting high speed emulation. When the integrated circuit chip is a programmable device and the system being tested is the circuit board (or the programming of the circuit board) in which the programmable logic device resides, it is desirable to be able to locate the programmable logic device as close as possible to its resident location while testing the ability of the circuit board to properly program and function with the programmable logic device. Further, with existing probes, it has not been possible to use an actual programmable logic device during testing of the circuit board.